What problem does 3D IC solve?
The semiconductor industry saw advanced application-specific integrated circuit (ASIC) technology nodes scale dramatically over the last 40 years, alongside higher performance. As we reach the limits of Moore’s law, device scaling becomes a challenge. Devices shrink at a slower rate, it takes longer and the cost is much higher for the technologies, design, analysis and manufacturing of these chips.
There are practical limitations on how large you can make a device. The photomask and reticle size ultimately determine a chip’s maximum size – roughly 25 to 27 millimeters on a side. So, physically, you cannot make a chip bigger than that. Since the number of transistors scaling has reduced, designers do not benefit from increased complexity by putting more and more devices into a single package. 3D IC designers do not face the same footprint challenges.
System on a chip (SOC) intellectual property are the basic building blocks implemented in that chip. Different types of functions require very specialized ASIC technologies. In some cases, it could limit what you can implement in the system because you would need all the IP available in the same process if you’re going to integrate that into a single chip. When we get into 3D IC, you no longer have that limitation. So, you can acquire chiplets, which perform a particular function, such as intellectual property. That chiplet can be optimized using the most appropriate technology for that type of functionality.
